# Gates and diode-resistor logic

This post gives an introduction to digital logic, dives into the semiconductor physics and finishes with an implementation in diode-resistor logic. It forms part of the quest to answer How do computers do math?.

## Logic gates

Digital systems use gates to make logical operations based on their input signals. These gates take one or more binary inputs and produce one binary output.

### OR gate

The OR gate is one of the simplest gates. The symbol and truth table for the OR gate are shown in the illustration below. The output is 1 when either input A or B are 1, otherwise it is 0. The OR gate is represented by Boolean algebra operator $$+$$. Note that in Boolean algebra $$1+1=1$$.

$$A$$ $$B$$ $$A+B$$
0 0 0
0 1 1
1 0 1
1 1 1

### AND gate

The AND gate, is represented by the Boolean algebra operator ‘$$\cdot$$’. Its output is 1 when both inputs are 1, otherwise it is 0.

$$A$$ $$B$$ $$A\cdot B$$
0 0 0
0 1 0
1 0 0
1 1 1

### XOR gate

The eXclusive OR gate (XOR) is represented by the symbol $$\oplus$$.

$$A$$ $$B$$ $$A \oplus B$$
0 0 0
0 1 1
1 0 1
1 1 0

### NOT gate

The inverter gate (NOT) represented by a bar above as in $$\overline{A}$$.

$$A$$ $$\overline A$$
0 1
1 0

### NOR and NAND gate

At times, an OR gate is combined with an inverter to form Not-OR, or NOR for short. The table below shows this gate and its truth tables.

$$A$$ $$B$$ $$\overline{A+B}$$
0 0 1
0 1 0
1 0 0
1 1 0

Other times, an AND gate is combined with an inverter to form to form Not-AND, or NAND for short.

$$A$$ $$B$$ $$\overline{A\cdot B}$$
0 0 1
0 1 1
1 0 1
1 1 0

## Semiconductor physics

There are many different ways to implemented digital logic. Nazi Germany (1941) used a system with electro-mechanical relays to calculate artillery-firing tables. Two years later the US army built a vacuum tube based system to simulate the hydrogen bomb. Currently, digital systems are built using the semiconductors we will discuss here.

Have you ever wondered about the jagged line on the right of the periodic table? It separates the metals (conductors) on the left from the non-metals (insulators) on the right. The elements creating the zigzag line share some properties of both conductors and insulators. These elements are called semiconductors or metalloids.

Using these semiconductors, we can build the gates that we need for digital systems. For this discussion, we will focus building gates using the element silicon.

### Pure silicon

Silicon is a a common semiconductor material. It has four electrons in the outer shell (valence shell). This causes it to form covalent bond with four neighboring atoms so that in its valence shell all eight electrons are present (as shown in the illustration below). These bonds hold the atoms together, making the element stable.

The bonds help form an orderly crystaline structure called a lattice. Because there are no free electrons, the material will not conduct electricity. The illustration above shows a simplified view of the lattice. The conductivity of the lattrice can be increased by adding very a small number (<1 ppm) of impurities. Examples of such impurities are phosphorous and boron.

### N-type silicon

Adding a tiny amount of phosphorous, which has five electrons in valence band, leaves an extra electron that can move easily. Four out of the five phosehorus’ valence electrons bond with their neighboring silicon atoms. This leaves one free electron that becomes mobile.

The resulting material is called an n-type because of the abundance of negatively charged electrons.

When you apply a voltage over an n-type material, electrons will move through the latticswork just as current would flow in a copper wire. The positive potential of a battery attracts the free electrons in the crystal. These electrons will leave the crystal and flow into the positive terminal of the battery. As electrons leave the lattice, electrons from the negative terminal of the battery will enter the lattice, completing the circuit.

### P-type silicon

Boron has only three electrons in its valence band. Add a tiny amount of it to silicon only allows for the formation of three covalent bonds. This leaves a hole where an electron can go.

The hole can move if a neighboring electron fills the hole, thereby creating a new hole in the neighboring location. You can imagine a hole has missing a negatively charged electron. In other words, the hole has a positive charge.

The resulting material is called a p-type semiconductor.

Conduction in the p-type material is by positive holes, instead of negative electrons. A hole moves from the positive terminal of the p-type material to the negative terminal. Electrons from the external circuit enter the negative terminal of the material and fill holes near this terminal. The positive terminal removes electrons from the covalent bonds, creating new holes.

This process continues as the steady stream of holes (hole current) moves toward the negative terminal.

### PN-junction

The magic starts when you create a PN-junction by bringing a p-type and n-type material in close contact. In the interface layer, the electrons from the n-type material and the holes from the p-type attract and eliminate each other in a process called recombination. Because of the lack of free electrons and holes in this area, we call it the depletion region.

The loss of an electron from the n-type material leaves a positive ion, while the loss of a hole from the p-type material leaves a negative ion. The crystal lattice structure keeps these charged ions in place, creating an electrostatic field across the junction.

This continues until the electric field from the negatively charged ions in the p-type material gets so strong that it repels the free electrons from the n-type material. In other words, the recombination of electrons and holes across the junction continues until the electrostatic field reaches the point where the electrons and holes no longer have enough energy to overcome it. At this point, an equilibrium is established. For all practical purposes, the movement of carriers across the junction ceases.

This so called depletion layer has no free electrons or holes, and consequently does not conduct electricity. At the depletion layer, the ions in the n and p-type materials cause a respectively positive and negative charge. This potential difference is typically measures 0.65 volts for silicon. In effect, the n-type material has become positive compared to the p-type.

If there were a free electron at the junction barrier, it will now require extra energy to cross the depletion region.

### PN-junction diode

This pn-junction makes a diode that conducts electrical current in one direction, and blocks current in the other direction. We will explain this by applying a bias voltage over the diode visualized with a battery. The energy from the battery will affect the depletion zone shown in white.

The symbol and some samples of diodes are shown below.

Reverse bias occurs when we apply a negative voltage, as shown below on the left. The free electrons in the n-region are pulled to the + terminal of the battery and the holes in the p-type region are pulled to the - terminal. With both charge carriers pulled away from the junction, the depletion layer widensm and the diode will conduct electricity even less.

When we reverse the battery, the diode is in forward bias, as shown above on the right. The free electrons in the n-region are attracted to the + terminal, and the holes in the p-type region are attracted to the electrons on the - terminal. With both the electrons and holes pulled towards the junction, the depletion layer gets very thin. Once enough voltage is applied, the diode starts conducting and electrons and holes flow freely with minimum resistance. This threshold voltage $$U_{th}$$ is about 0.65 volts for silicon diodes.

With the two opposite flow of electrons and holes, some will eventually recombine. An electron will fall from a higher energy level to a the lower energy level of the hole. This leads to energy beging released in the form of a photon.

According to quantum theory, the energy of a photon is the product of frequency $$f$$ of electromagnetic radiation and the Planck constant $$\hbar$$. The frequency is the quotient of the speed of light $$c$$ and the wavelength $$\lambda$$.

In silicon or germanium diodes, the wavelength corresponds to infrared radiation (heat). For Light Emitting Diodes (LEDs), the p and n-type materials are chosen so that the energy is released as visible light.

\left. \begin{align} E_g&=\hbar\ f\nonumber\\ f&=\frac{c}{\lambda}\nonumber \end{align} \right\} \implies\ \lambda=\frac{\hbar\ c}{E_g}

When we plot the current as a function of the bias voltage, we get the characteristic graph shown above. From the graph, we see that the diode has a very small leak current in reverse bias, and starts conducting once the forward bias surpasses the threshold voltage $$U_{th}$$.

Using an AC signal generator and diode-resistor circuit, an xy-plot on an oscilloscope can visualize this. The voltage over the resistor is representative of the current through the diode.

## Diode-resistor logic (DRL)

By combining diodes with resistors, we can create logic gates. In these, the diodes act as electrically operated switches. The following examples assume TTL levels, where an input value of 0 to 0.8 volts is recognized as a logic 0, and 2 to 5 volts is recognized as 1.

### OR Gate in DRL

If at least one of the inputs is a logic 1 (5 V), the output will be a logic 1. Otherwise, the output will be a logic 0. In Boolean algebra that is written as $$X=A+B$$.

A logic OR-gate can be built using two diodes and a pull-down resistor as shown above. The 1N4148 is a common switching diode. If both inputs are logic 0, then the resistor will pull the output to ground (logic 0). If either input is a logic 1, the resistor limits the current through the diode. In that case, the output will be 5 volts minus the diode voltage drop. This is considered a logical 1.

In the simulation, click on an input on the left to toggle its state. The circuit is at rest when both inputs are Low (0 V). In this case, the resistor pulls the output down to 0 volts. When either input level is high, current flows through the diode and the resistor. The diode is in forward bias with a voltage drop of about 0.65 volts. Consequently, the output will be 5 – 0.65 volts, which is recognized as logic 1.

### AND Gate in DRL

If both inputs are logic 1 (5 V), the output will be a logic 1. Otherwise, the output will be logic 0. In Boolean algebra this is written as X = A · B.

A OR gate can be made as shown in the schematic above. If both inputs are logic 0, current will flow through the diode, making the output equal to the diode voltage drop (0.65 V), a logic 0. Otherwise, the resister will pull the output to 5 volts, a logical 1.

In the simulation, click on an input on the left to toggle its state. The circuit is at rest when both inputs are logic 1 (5 V). In this case, the resistor pulls the output up to 5 volts. When either or both inputs are logic 0, current flows through the resistor and diode. The diode is in forward bias with a voltage drop of about 0.65 volts. Consequently, the output will be 0.65 volts above the input value of 0 volts, what is recognized as logic 0.

### Combining gates in DRL

As we have seen, the output voltage levels of the single gates were a little off from the ideal levels of 0 and 5 volts. The circuit below cascades 2 OR gates with one AND gate to build the Boolean expression $$X=(A+B)\cdot(C+D)$$.

Simulating this circuit reveals a problem when the output should be 0. The circuit in effect acts as a voltage divider, where the current from the pull-up resistor splits over the two diodes and flows to ground over both pull-down resistors. Output voltage $$U_x$$ follows from the current through the pull-up resistor $$I_{u}$$:

\newcommand{\parallelsum}{\mathbin{\!/\mkern-5mu/\!}} \left. \begin{align} I_{u} &= \frac{5 – 0.65}{10\mathrm k + 10\mathrm k \parallelsum 10\mathrm k} = \frac{4.35}{15\mathrm k} \nonumber \\ U_X&=5 – I_{u}\cdot 10\mathrm{k} \nonumber \end{align} \right\} \implies U_X = 5 – \frac{4.35}{15\cancel{\mathrm{k}}}\times10\cancel{\mathrm{k}}=2.1\ \mathrm V

Simulation confirms that combining the gates causes a problem where the output should be a logical 0 as shown below on the left. We can improve this specific circuit by increasing the pull-up resistor to $$470\ \mathrm{k\Omega}$$. I will spare you the math, and simply hover over the $$X$$ wire in the simulation to reveal the output voltage values . Now, all these levels are within the correct TTL range as shown below on the right.

Simulated results before
$$U_A$$ $$U_B$$ $$U_C$$ $$U_D$$ $$U_X$$
0.00 V 0.00 V 0.00 V 0.00 V 2.10 V
0.00 V 5.00 V 0.00 V 0.00 V 2.83 V
5.00 V 0.00 V 5.00 V 0.00 V 4.88 V
5.00 V 5.00 V 5.00 V 5.00 V 4.90 V
Simulated results after
$$U_A$$ $$U_B$$ $$U_C$$ $$U_D$$ $$U_X$$
0 V 0 V 0 V 0 V 0.60 V
0.00 V 5.00 V 0.00 V 0.00 V 0.67 V
5.00 V 0.00 V 5.00 V 0.00 V 4.79 V
5.00 V 5.00 V 5.00 V 5.00 V 4.81 V

The following chapter will introduce the transistor and how it can be used to build improved logic gates. When using resistor-diode logic, the voltage drop in the diodes and power dissipation in the resistors degrade the signal as it passes through the gates. As we will see on the next page, these problems solved by introducing another semiconductor: the transistors.

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