This post describes the physics of Bipolar Junction Transistors (BJT), and uses these to build logic gates. This is part of a quest to answer “How do computers do math?”.
If you are pressed for time, overwhelmed by the semiconductor physics, or simply to curious to find the answer to the inquiry, you may skip forward to Math operations using combinational logic. However, if you are somebody who likes to know it all, I encourage you to work through this chapter. \(\)
Bardeen, Brattain and Shockley invented the transistor in 1947. They greatly reduce energy consumption, weight and footprint compared to the existing vacuum tubes. This enabled groundbreaking new developments such as landing a man on the moon. The illustration below shows the symbols for bipolar junction transistors (BJT, along with some examples of them.
In this context, the term “bipolar” refers to the two charge carriers: electrons and holes in the same crystal. The model of the Bipolar Junction Transistor is a “voltage controlled current device”, even though for small signals we typically model it as a current amplifier. We will explain this by exploring the BJT semiconductor physics of a NPN-junction.
Semiconductor physics
Joining three layers of semiconductor material creates a transistor. There are two types of bipolar junction transistors. The PNP transistor has a very thin n-type layer between p+ and p-type material. In this the + sign indicates more heavily doped material. The other type of transistor, the NPN transistor, has a very thin p-type layer between n and n+ type materials as shown in the image below.
The physics of both types of transistor are very similar, except that the electron flow is dominant in NPN transistors, while PNP transistors rely mostly on the flow of “holes”. NPN transistors are more popular, because electrons move faster than “holes”. In this discussion, we will focus on the NPN transistor.
When a NPN transistor has no bias (voltage), the base-emitter and base-collector junctions behave like diode junctions as shown in the image below. That means we can apply what we learned in the previous chapter. At both junctions, the electrons from the n-type material and the holes from the p-type attract and recombine leaving positive and negative ions behind. This continues until the electrons and holes no longer have enough energy to overcome the electrostatic field created by the ions, about 0.65 volts. The resulting depletion area acts as an insulator.
When we apply a forward bias on the base-emitter junction, as shown below on the left, it pulls the holes in the p-type region to the electrons on the - terminal of the battery, and the electrons in the n-region to the + terminal. With both the electrons and holes pulled towards the junction, the depletion layer becomes very thin. Once enough voltage is applied, the base-emitter junction starts conducting and electrons and holes flow freely. The result is a small flow of holes from the base to the emitter, and electrons from the opposite direction. Together these flows are called the base current \((I_b)\).
When we also apply a strong reverse bias on the collector-base junction, the free electrons and holes pull away from the junction and the depletion layer widens as shown in the bottom-right image. The magic lays in the extremely thin depletion layer between the base and emitter and the strong charge on the collector.
Once the electrons “emitted” by the emitter reach the very narrow base region, the strong electric field from the collector attracts them. The electrons will cross the reverse biased collector-base junction to be “collected” by the collector. The result is a net flow of electrons from the collector to the emitter, or in other words: an electrical current from the collector to the emitter (\(I_c\)). This current is substantially larger than the current (\(I_b\)) that reduced the width of the base-emitter depletion zone. In other words, the small base current (\(I_b\)) controls the much larger collector current (\(I_c\)).
Note that even though the base-emitter threshold voltage is 0.65 volts, the collector-emitter drop will be much lower, in the order of a few millivolts. This is because the electric field over the collector-base junction is opposite to that of the base-emitter junction.
Transistor based logic
The problem with diode-resistor circuits was the signal degradation which kept them from being cascaded. RTL replaces the diode switch with a transistor switch. The transistor ensures that the output voltage will always be a valid logic level, so they can be cascaded indefinitely.
Resistor-transistor logic (RTL)
Transistors can be used to amplify signals, but in this context we are only interested in using them as on/off switches. This implies that we apply no base-emitter bias, or apply enough bias to make the collector-emitter conduct.
NOT Gate in RTL
The circuit shown below gives the most basic implementation of a BJT gate, where the transistor is used to invert a logical input signal.
When a 5 volts signal (logic 1) is applied at input \(A\), the base-emitter junction is forward biased, resulting in maximum collector current and a minimum collector-emitter voltage drop. The transistor is switched “on”, and the output \(X\) is a logic 0. On the other hand, if the input is grounded (logic 0), the base current (\(I_b\)) is zero, and there will be no collector-emitter current. With the transistor switched “off”, the resistor pulls the output signal up to 5 volts, a logic 1.
A simulation confirms that the output values stay well within the TTL range. The circuit is at rest when the inputs is logic 0 (0 V). In this case, the resistor pulls the output up to 5 volts. An input value of logic 1 turns the transistor “on” so that current flows through the resistor and into the connector-emitter.
| \(U_A\) | \(U_X\) |
|---|---|
| 0.00 V | 5.00 V |
| 5.00 V | 0.06 V |
This implies that the transistor inverts the input signal, while ensuring that the output voltage is a valid TTL level. By extending this NOT gate, we can build other logic gates.
NOR Gate in RTL
Putting two NOT gates in parallel, creates a two-input NOR gate as shown in the circuit below. A simulation confirms that the output values stay within the TTL range. The circuit is at rest when both inputs are logic 0 (0 volts). In this case, the resistor pulls the output up to 5 volts. When either input is logic 1, the corresponding transistor turns “on” so that current flows through the resistor and connector-emitter.
| \(U_A\) | \(U_B\) | \(U_X\) |
|---|---|---|
| 0.00 V | 0.00 V | 5.00 V |
| 0.00 V | 5.00 V | 0.06 V |
| 5.00 V | 0.00 V | 0.06 V |
| 5.00 V | 5.00 V | 0.04 V |
NAND Gate in RTL
Putting two NOT gates in series creates a two-input NAND gate as shown in the circuit below. The simulation confirms that the output values stay within TTL range. The circuit is at rest when at least one input inputs is logic 0 (0 V). In this case, the resistor pulls the output up to 5 volts. When both inputs are logic 1, the corresponding transistors turn “on” so that current flows through resistor and connector-emitter, driving the output to logic 0.
| \(U_A\) | \(U_B\) | \(U_X\) |
|---|---|---|
| 0.00 V | 0.00 V | 5.00 V |
| 0.00 V | 5.00 V | 5.00 V |
| 5.00 V | 0.00 V | 5.00 V |
| 5.00 V | 5.00 V | 0.12 V |
Limitations of RTL
The RTL gates have two limitations: (1) the input resister and \(C_{be}\) create a RC time that slows down state transitions, and (2) the input resistor take up a significant footprint in an integrated circuit. We will address the first limitation by replacing the input resistor with diodes. The next page tackles the second limitation.
Diode-transistor logic (DTL)
The switching speed of the NOT gate can be improved by replacing the input resistor with two diodes and a resistor as shown in the circuit below. Diodes are not only smaller but also have a low internal resistance when forward biased, thus allowing faster switching. The diode connected to the transistor base raises the input voltage required to turn the transistor “on” to about 1.3 volts.
| \(U_A\) | \(U_X\) |
|---|---|
| 0.00 V | 5.00 V |
| 5.00 V | 0.04 V |
The simulation results are noted in the table on the right. Similar to the resistor-transistor logic, by adding input diodes, we can build an NAND gate, and by placing the inverter in parallel we can make a NOR gate.
Transistor-transistor logic (TTL)
In the DTL gate, there are two diodes have their P-type anodes connected together and to the pull-up resistor. A single NPN transistor can replace these two diodes while taking up about the same amount of space. The figure below shows a NOT gate build using TTL logic. The simulation results are noted in the table on the right.
| \(U_A\) | \(U_X\) |
|---|---|
| 0.00 V | 5.00 V |
| 5.00 V | 0.02 V |