This series shows some implementation of math operations introduced in chapter 7 of the inquiry "How do computers do Math?".
What good are fast math circuits, if you can't show them off? A test setup to both verify the implementation of the circuits.
Implements an adder and subtractor using Verilog HDL.
Introduces algorithms to reduce the delay when adding numbers. A look at two carry-lookahead circuits.
Builds a carry-propagate array multiplier.
Investigates methods of implementing binary multiplication with less latency.
Builds an attempt-subtraction divider.
The method implemented here is a simplification of Samavi's and Sutikno's improvements of the non-restoring digit recurrence square root algorithm.